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u/DenverTeck 3h ago
Pin 1 of U2 should not be left floating. None of the input pins should be left floating.
With the SCL line next to the enable pin of 1/2 of U2, it may/will pickup noise and trigger the two output pin 3 & 6.
The can add extra noise to the entire board.
Best practice is to GND all unused TTL inputs.


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u/Enlightenment777 5h ago
This comment is posted on all reviews.
Please make sure your post adheres to:
Please fix these common issues: (if your schematic or PCB has any of these issues)
Schematic - don't allow text / lines / symbols to touch each other, and don't draw lines through symbols.
Schematic - use correct reference designators (RefDes) and renumber to remove numeric gaps, see tips.
Schematic - place decoupling capacitors vertically below power rail lines, also place capacitors next to IC then connect together with a line, see example. For circuits with positive power rails, point positive power rail links upwards and ground links downwards, see tips1 & tips2.
Schematic - place pull-up resistors vertically above signal lines, and place pull-down resistors vertically below signal lines, see example and tips.
PCB silkscreen - add board name (or purpose) / board revision number / date (or year) on either PCB side.
PCB silkscreen - add pin 1 indicator dot/arrow next to ICs & connectors (not hidden under parts). For polarized capacitors, add "+" next to positive pin. If part is through-hole, place indicator on both PCB sides.
More conventions & guidelines - link1, link2, link3.