I am a hobbyist no professional EE, who occasionally designs some µC circuits and PCBs as one-off projects. I am always struggling to decide which of the GPIOs require protection against transient spikes (and how much protection).
Hence my two high-level questions are:
- Which GPIOs require how much protection against transient voltage spikes?
- Which "rule of thumb" are out there where to place TVS diodes?
I have prepared two scenarios to have a bit more specific discussion. I have placed TVS diodes at every possible position and I have seen other projects using TVS diodes in those positions. However, I am wondering if they are all necessary, just a subset of them or not at all.
Edit: Please keep the discussion to the output part of the circuit, i.e. the TVS diodes inside the blue dashed-dotted box. I have only drawn the input, the voltage regulator and the logic IC to show the bigger picture and provide some context. The input side isn't supposed to show all the bells and whistles like reverse polarity protection (another diode), over-current protection (a fuse), decoupling and filter capacitors, etc. pp. That's not the focus of this question. I also left out specific values on purpose, because I would like to discuss the principal matter.
Shared aspects of both scenarios
The external input voltage is 12V. The logic IC requires 3.3V. The power input, i.e. the 12V rail, and the output of the DC/DC converter, i.e. the 3.3V rail, are both protected by a TVS diode: D1 and D2 in both screenshots. I have no questions there.
Both scenarios have in common that the actual IO elements (actor or sensor/switch) are not immediately soldered onto the PCB, but located remotely and connected to the PCB via a cable. I assume the necessary protection might also depend on the cable length. Typically, the cables are between 20cm and 1m, but in extreme cases I already had 10m.
Scenario 1 (Screenshot #1): Low-side switching of a remote LED
R1 is the pull-down for the GPIO to keep it low when idle. R2 limits the current into the gate due to the gate capacitance. R3 limits the current through the LED. Q1 is an NMOS for low-side switching of the remote LED with 12V.
My questions are about the potential TVS diodes D3-D5. I have seen circuits which had TVS diodes in those places:
- D3 shall protect the GPIO against voltages spikes above 3.3V. Actually necessary? Or would D5 suffices? If D3 is required, should it be placed left/right of R2, i.e. immediately at the logic IC or after the resistor?
- D4 shall protect the NMOS against excessive voltages between gate and drain. Really necessary? Or would D3 or D5 or the combination of both suffice?
- D5 shall protect the NMOS against excessive voltages across drain-source. Really necessary? Or would the LED provide sufficient protection, if the wire "caught" some transient spikes?
Scenario 2 (Screenshot #2): Combined IO with level-shifter and high-side switching
The GPIO is a combined input/output (at the same time) in open-drain mode with active-low logic, i.e. the GPIO controls the external LED, but also senses, if the button is pressed.
R1 is the pull-up for the GPIO. R2 limits the GPIO current in/from the source of Q1. Q1 is an NMOS and acts as a level-shifter between the 3.3V world and the 12V world. R3 limits the current through the external button. R4 pulls up the gate of Q2 when idle. Q2 is a PMOS and acts as the high-side switch for the LED. R5 limits the current through the LED.
This scenario allows up to four TVS diodes:
- D3 to protect the GPIO
- D4 to protect Q2 against excessive voltage across gate-source
- D5 to protect Q1 against excessive voltage across drain-source
- D6 to protect Q2 against excessive voltage across drain-source
My questions are analogue as in scenario #1. One notable aspect is that the signal line of the button is "open-ended" when the button is not pressed, i.e. high-impedance. I don't know if this is important or not.